The VMS SharkOpenVMS Notes: Raxco System Tuning

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  3. The information and software presented on this web site are presented to you as-is. I will not be held responsible in any way if the information or software presented on this web site damages your computer system, business or organization (sounds like the legal warning from a Microsoft shrink-wrap seal, eh?)
  4. The information presented on this page can be really dangerous if you don't know what you are doing.
<<< Alert >>>

I have been trying to publish this stuff for the past 3-months but life keeps throwing me distractions. I was just thrown another so will probably be offline for the next 3-4 weeks. For this reason I decided to publish the stuff as-is. I still need to OCR chapter 10.

Neil Rieck, 2010-10-21


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Introduction

Back in 1987, I had the pleasure of attending a multiday VAX/VMS tuning seminar put on by Raxco. At that time, the lecturer, Clayton J. Prestia, presented the audience with a plethora of VMS tuning information that I didn't know was buried elsewhere in numerous volumes of DEC's own literature.

At that time, I was a member of a team managing two VAX-11/750's and eight VAX-11/730's distributed across the Canadian province of Ontario (we were also the application developers). The 730's would really bog down whenever there were 10-12 active interactive processes.

  1. Raxco-based tuning allowed me to double this number to twenty.
     
  2. I was able to use recommendations from the Raxco course notes to convince my peers that a change in our programming techniques would make the system much faster. Our biggest changes resulted in much lower file locking and Lock Manager overhead.

Before this Raxco tuning operation, wheels had already been put in motion to purchase a pair of VAX-8550s which would be operated as a VAX-Cluster from a central location in Toronto (replacing the ten distributed machines just mentioned). Even though these new machines had been installed with a maximum amount of memory (80 MB which seemed huge at the time), Raxco-based tuning still improved their operation.

In 2010, I still am responsible for several VMS systems including two AS-2100 platforms, one AS-4100 platform, and two AS-DS20e platforms. I still use some of this material to tune these systems as well as educate others.

VMS Evolves

The Raxco seminar was based upon VMS-4.x for VAX in 1987 but VMS has changed for the better with each successive release. In the early 1990's, DEC developed the 64-bit Alpha processor and even though the code base for Alpha was separate from that used by VAX, bugs corrected in the Alpha version of VMS (now called OpenVMS) were back ported to VAX. In the early 2000s the 64-bit code base, which was only meant for Alpha, was adapted to generate code for 64-bit Itanium (which HP named Integrity). HP engineers have told me privately that the so-called Alpha-to-Itanium port was the first time a new set of eyes were collectively engaged in examining/improving OpenVMS since the previous port from VAX to Alpha. So whether you were a fan of Itanium or not, the 2002-4 port was generally a good thing.

32-bit VAX 64-bit Alpha 64-bit Itanium
VMS 1.x    
VMS 2.x    
VMS 3.x    
VMS 4.x    
VMS 5.x    
OpenVMS 6.x OpenVMS 6.x  
OpenVMS 7.x OpenVMS 7.x  
  OpenVMS 8.x OpenVMS 8.x
Timeline:

Life This Side of Y2k

Why does this history matter? Well, in the days of VMS 4.x electronic memory was very expensive (compared to now) which meant there was never enough available. For example, the big VAX-8550 I mentioned previously could only accept a maximum amount of 80 MB although a third party modification would allow you to increase this limit. Today, memory is cheaper and faster (DRAM-SDRAM-DDR-DDR2) which means that Alpha and Itanium systems almost always have access to much more.

Because most memory in 1987 was smaller in size, the default behavior of either "VMS Tuning" (or "Raxco Tuning") involved enabling and using AWSA (automatic working set adjustment) reduction. This meant that processes not actively using memory on a busy system would be required to surrender LRU (least Recently Used) pages to the FREELIST or MODIFIED LIST. Currently faulting processes could SOFT FAULT those pages back unless the system had already reassigned the memory meaning that the SOFT FAULT would need to be converted to a HARD FAULT (involving one, or more, disk I/O's)

Poking around tuning scripts (like AUTOGEN) this side of Y2K will reveal that AWSA will be disabled by default whenever a minimum of 500 MB of memory is present. This means that many Alpha or Itanium system will almost always have AWSA disabled.

Where I disagree with RAXCO:

Raxco Seminar Notes (1987)

Public Domain Notice

On June 30, 2010 I contacted RAXCO Software president Robert E. Nolan to obtain permission to make these notes freely available to the VMS Community. Permission was granted (verbally) provided the original RAXCO copyright remains in place.

On behalf of the VMS community, "thank you Robert".

Unsolicited Advert:

Raxco sells Perfectdisk for Windows as well as Performance Suite for OpenVMS and RaxcoSupport Suite for OpenVMS so please send them some of your business.

Scanning

Contents (Chapters in HTML Format)

  1. Raxco-0 - Cover Sheet (VMS-4.x)
  2. Raxco-1 - Introduction
  3. Raxco-2 - The VAX CPU
  4. Raxco-3 - VMS Memory Management
  5. Raxco-4 - Input / Output
  6. Raxco-5 - Data Gathering
  7. Raxco-6 - Operations Management
  8. Raxco-7 - Programming Techniques
  9. Raxco-8 - Capacity Planning
  10. Raxco-9 - VMS Memory Management Tuning Procedure
  11. Raxco-A - Supporting Green-Screen Displays (see the PDFs; I might not produce HTML versions)

VM Definitions

Different vendors have slightly different meanings for the phrases "working set", "resident set", "balance set", etc. Here are a few official definitions from official OpenVMS documentation.

 
Working set The total number of a process’s pages in physical memory. It is a subset of the total number of pages allocated to a process. Also called the primary page cache.
Balance set The sum of all working sets currently in physical memory.

link: http://h71000.www7.hp.com/doc/73final/6491/6491pro_002.html#memory_chap
Resident Set
  • The set of pages currently in memory for a process is called the process's resident set and is described by a pager data structure.
  • When the resident-set limit is reached, the faulting process must release a page for each newly faulted page added to its resident set
  • As the program executes, the pager loads the page whenever a non-resident page is referenced
  • When the resident-set limit is reached, the faulting process must release a page for each newly faulted page added to its resident set.
  • FIFO replacement algorithm is used to select the page to be removed
  • When a page is removed from a process’s resident set, it is placed on one of two page lists: the free page list or the modified page list
  • If the modify bit is zero in the page table entry, the page is added to the tail of the free list
  • If the modify bit is one in the page table entry, the page is queued on the tail of the modified page list.
  • If a process faults a page that is on either list, the page is returned to the process’s resident set
link: http://www.d.umn.edu/~cprince/courses/cs8631spring10/papers/VAXVirtual.pptx
  Primary page cache where processes execute: the balance set resides in the primary page cache.
Secondary page cache where data is stored for movement to and from the disks. The secondary page cache consists of two sections as follows:
 - Free Page List
 - Modified Page List
Hard Fault
Soft Fault
required page is retrieved from disk (pagefile or program image)
required page is retrieved from secondary cache

link: http://h71000.www7.hp.com/doc/73final/6491/6491pro_002.html#memory_chap

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Neil Rieck
Kitchener - Waterloo - Cambridge, Ontario, Canada.